Programme
This is a preliminary schedule of topics
that will be covered in the course. The exact arrangement of topics is subject to change.
All events take place at Room 603 Chow Yei Ching Building. Please consult this map to locate Chow Yei Ching Building at University of Hong Kong.
Preliminary Schedule
Date |
Time |
Event |
23 July |
09:00-09:30 |
Opening & Course Overview
Hayden So |
09:30-12:30 |
Performance Aware Programming: A System Perspective
Hayden So |
12:30-14:00 |
Lunch & Poster Session |
14:00-17:30 |
Introduction to FPGA Architecture and CAD
Lesley Shannon |
24 July |
09:00-12:30 |
Introduction to CNNs and OpenCL
Nachiket Kapre |
12:30-14:00 |
Lunch & Poster Session |
14:00-17:30 |
RTL Design of Matrix Computations
Nachiket Kapre |
25 July |
09:00-09:30 |
Quantization and Datatype Optimization
Philip Leong |
12:30-14:00 |
Lunch & Poster Session |
14:00-17:30 |
Optimizing OpenCL Kernels
Martin Herbordt |
26 July |
09:00-12:30 |
High-Level Synthesis
Jason Anderson |
12:30-13:30 |
Lunch |
27 July |
09:00-12:30 |
GPU Programming
Martin Herbordt |
12:30-14:00 |
Lunch |
14:00-17:00 |
Dataflow Programming
Wayne Luk |
17:00-17:30 |
Closing
Hayden So |
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